Boolean Logic

• Two states, six symbols, four representations, nine conversions, and one rule that overrides your instincts: draw what you were given, not what you would have designed.
• Every two-input gate is defined by which of the four rows carry a 1. AND: the last row only. OR: all but the first. NAND: all but the last. NOR: the first row only. XOR: the two middle rows.
• Equivalent output is not enough. If the required structure has been changed, the answer is wrong — however elegant it is, and however many rows of the truth table agree.

• Draw, from memory, the standard symbol for NOT, AND, OR, NAND, NOR and XOR (EOR) exactly as section 4 of the syllabus prints them, including the inversion circle where there is one.
• State in one sentence what each gate does, and give its complete truth table without hesitation.
• Produce the binary output for every possible binary input of a gate or a circuit, working each row out independently.
• Write the correct number of rows for one, two or three inputs, in binary counting order, without omitting a combination.
• Turn a problem statement into a logic expression, a logic circuit and a truth table.
• Turn a logic expression into a logic circuit and a truth table.
• Turn a logic circuit into a logic expression and a truth table, labelling intermediate results as you go.
• Turn a truth table into a logic expression and a logic circuit using the output-1 rows method.
• Keep every gate within its input limit, keep a circuit within three inputs and one output, and never simplify a given structure.
• Recognise, in someone else’s answer, a wrong symbol, a missing row, a reversed output, an illegal three-input gate and an unwanted simplification.

Why the order matters. Every conversion in step 5 is built out of steps 1 to 4. A candidate who cannot reproduce the NAND truth table instantly will get a circuit-to-truth-table question wrong no matter how carefully they trace the wires, because the error is not in the tracing. Get steps 1 to 3 to the point of boredom before you spend time on step 5.

AND Gate

A two-input logic gate whose output is 1 only when both inputs are 1 and 0 in every other case; its symbol is a D shape with a flat back and a semicircular nose, and it is written X = A AND B.

Truth Table

A table that lists every possible combination of the inputs to a logic gate or logic circuit, one combination per row in binary counting order, together with the binary output produced for each combination; a table with n inputs has 2 to the power n rows and may carry extra columns for intermediate gate outputs.

Logic Gate

An electronic building block that takes one or two binary inputs and produces a single binary output determined by a fixed rule; the syllabus covers NOT, AND, OR, NAND, NOR and XOR (also called EOR), each drawn with its own standard symbol.

Logic Gate Symbols

Logic gate symbols are the six standard drawings used to represent the NOT, AND, OR, NAND, NOR and XOR gates in a logic circuit, each with a fixed body shape and a fixed number of inputs.

Logic Expression

A written form of a logic circuit in which the inputs are letters, the operations are written as capitalised words such as NOT, AND, OR, NAND, NOR and XOR, and brackets show exactly which parts are grouped together; the output is named on the left of an equals sign.

Circuit to Expression

Circuit to expression is the reading of a drawn logic circuit back into a bracketed expression, tracing from the inputs forward and writing each gate's output as a bracketed term that feeds the gate after it.

Statement to Truth Table

Statement to truth table is the two-stage conversion of a described system into a completed truth table, first turning the statement into a logic expression and then evaluating that expression over every input combination.

NOR Gate

A two-input logic gate whose output is the inverse of OR: it is 1 only when both inputs are 0 and 0 in every other case; its symbol is the OR shield shape with a small inversion circle on the output, and it is written X = A NOR B.

NAND Gate

A two-input logic gate whose output is the inverse of AND: it is 0 only when both inputs are 1 and 1 in every other case; its symbol is the AND D shape with a small inversion circle on the output, and it is written X = A NAND B.

NOT Gate

A single-input logic gate, also called an inverter, whose output is the inverse of its input: an input of 0 gives an output of 1 and an input of 1 gives an output of 0; its symbol is a right-pointing triangle with a small inversion circle at the tip, and it is written X = NOT A.

Distinguishing the Six Gates

Distinguishing the six gates is the ability to name any of NOT, AND, OR, NAND, NOR and XOR from its truth table, its symbol or a description of its behaviour, using the row where each pair of similar gates disagrees.

Expression to Circuit

Expression to circuit is the drawing of a logic circuit directly from a bracketed expression, working outward from the innermost brackets so that each operator becomes one gate and the structure of the expression is reproduced exactly.

Circuit to Truth Table

Circuit to truth table is the completion of a truth table for a drawn circuit by listing every input combination and evaluating the gates in order, using a working column for each intermediate gate output.

Truth Table to Circuit

Truth table to circuit is the two-stage construction of a logic circuit from a completed truth table, first recovering the expression from the rows whose output is 1 and then drawing that expression gate by gate.

Statement to Expression

Statement to expression is the six-step conversion of a described system into a bracketed logic expression, in which every input condition is given a letter, the meaning of 1 is written down, and each operator is justified by a word in the statement.

Do Not Simplify Rule

The do-not-simplify rule is the syllabus requirement that a logic circuit be drawn for the statement exactly as given, without simplification, so that the drawn structure matches the structure that was asked for.

Expression to Truth Table

Expression to truth table is the completion of a truth table from a bracketed logic expression by evaluating the innermost brackets first as working columns and combining them outward to give the final output column.

Truth Table to Expression

Truth table to expression is the recovery of a logic expression from a completed truth table by writing an AND term for each row whose output is 1, negating the inputs that are 0 in that row, and joining the terms with OR.

Checking a Logic Answer

Checking a logic answer is a fixed set of checks run over any completed Boolean logic answer — row count, input ordering, gate input counts, connected inputs, bracket structure and output column — that names the fault when one is found.

OR Gate

A two-input logic gate whose output is 1 when one or both inputs are 1 and 0 only when both inputs are 0; its symbol is a shield shape with a curved back and a pointed nose, and it is written X = A OR B.

XOR Gate

A two-input logic gate, also written EOR and read as exclusive OR, whose output is 1 when the two inputs are different and 0 when they are the same; for two inputs this is the same as saying exactly one input is 1. Its symbol is the OR shield with a second curved line just outside the back, and it is written X = A XOR B.

• “OR means exactly one of the inputs is 1.”ActuallyThe OR gate is inclusive: it outputs 1 when one input is 1, and also when both are. 1 OR 1 = 1.The real gate“Exactly one” is XOR, and it is a different symbol with a different truth table.Why it happensEveryday English uses “or” exclusively — “tea or coffee” rarely means both.
• “XOR and OR are the same thing.”ActuallyThey differ on the row where both inputs are 1: OR gives 1, XOR gives 0. They agree on the other three rows, which is exactly what makes the confusion survive.In the examThe 1 1 row is the row a question about the difference will test.
• “XOR and EOR are two different gates.”ActuallyThey are two names for one gate. The syllabus writes it as XOR (EOR). Same symbol, same truth table, same everything.In the examUse whichever name the question uses; neither is worth more.
• “NAND is just another way of writing AND.”ActuallyNAND is the inverse of AND. AND gives 0, 0, 0, 1 down the four rows; NAND gives 1, 1, 1, 0. They agree on no row.The tellThe inversion circle on the output of the symbol.
• “NOR outputs 1 when either input is 1.”ActuallyThat is exactly backwards. NOR outputs 1 only when both inputs are 0, and 0 in every other case.Fix it with one factNOR is the inverse of OR, and OR is 0 only in the 0 0 row, so NOR is 1 only in the 0 0 row.
• “A NOT gate can take two inputs.”ActuallyNOT is a single-input gate. The syllabus states it explicitly, and there is no two-input NOT symbol.What you have really gotTwo wires arriving at a NOT means an AND or an OR has been left out. Draw the missing gate, then feed its single output into the NOT.
• “Any gate can be given three inputs if the question needs it.”ActuallyAll gates except NOT are limited to two inputs. There is no three-input symbol in section 4 of the syllabus.The fixCascade. Three conditions ANDed together take two AND gates; four take three.
• “The little circle on the symbol is decoration.”ActuallyThe circle means invert. It is the entire difference between AND and NAND, and between OR and NOR.Cost of omitting itA NAND drawn without its circle is an AND, and is marked as one.
• “A NAND needs a NOT gate drawn after it to do the inverting.”ActuallyThe inversion is already inside the NAND symbol — that is what the circle is. Adding a NOT gate afterwards inverts a second time and turns the pair back into an AND.Same for NORA NOR followed by a NOT is an OR.
• “A truth table can leave out combinations that could not happen in real life.”ActuallyA truth table lists every possible combination of the inputs, whether or not the physical system could produce it.WhyThe table describes the logic, not the plumbing. A tank sensor pair that could never read 0 and 1 together still gets that row.
• “A three-input truth table has six rows.”ActuallyIt has eight. Rows are 2 to the power n: two inputs give four rows, three inputs give eight.Fast checkIf the row count is not 2, 4 or 8, something is missing.
• “It does not matter if the row order changes part way down.”ActuallyThe standard order is binary counting order, and it must hold for the whole table.What goes wrongIndividually correct values land in the wrong rows, and the whole output column is then wrong for a reason nobody can see.
• “Logic 1 always means the same voltage.”ActuallyLogic 1 and logic 0 are logical states. Different logic families represent them with different electrical conditions, and there is no single universal voltage.For this paperWork in 1 and 0. Do not state a voltage as if it were part of the definition.
• “Boolean logic is just binary arithmetic.”ActuallyIn binary arithmetic 1 + 1 = 10, with a carry. In Boolean logic 1 OR 1 = 1 and 1 AND 1 = 1.The differenceA gate has one output. It can never produce two digits and never carries.
• “Intermediate columns are a waste of time.”ActuallyFor anything past two gates they are the difference between eight easy calculations and eight chances to lose track.In the examUse any space the printed grid leaves beside the output column for your intermediate results, and rule your own working columns beside the table if it leaves none.
• “The brackets in an expression are optional.”ActuallyThe brackets are the grouping. (T OR H) AND (NOT R) and T OR (H AND (NOT R)) are different circuits with different truth tables.Habit to buildBracket every part you write, even when you think it is obvious.
• “A simpler circuit with the same outputs is always acceptable.”ActuallyThe syllabus requires circuits to be drawn for the statement given, without simplification.The testEquivalent output is not enough. If the required structure has changed, the answer is wrong.
• “NOT (A AND B) should always be drawn as a NAND.”ActuallyOnly if the question wrote NAND. NOT (A AND B) names two operations and needs two gates.When NAND is rightWhen the expression says A NAND B, or when you are building an expression yourself from a statement that says “not both”.
• “If three things have to be combined I can draw one bigger gate.”ActuallyThere is no three-input gate symbol on this syllabus, so the drawing is not a valid answer at all.The fixTwo cascaded two-input gates, and say so in the expression with brackets: (A AND B) AND C.
• “A circuit can have more than one final output, and they need not be labelled.”ActuallyTopic 10 circuits have one output, and it must be labelled.Why labelling mattersAn unlabelled drawing cannot be marked against the expression it was supposed to build. Label the inputs too.
• “To read a circuit, start at the output and work backwards in your head.”ActuallyStart at the inputs, label every gate output as you meet it, and write one line per gate before substituting.What goes wrong otherwiseGates in the middle get skipped, and the person who skipped them almost never notices.
• “Truth-table-to-circuit questions need Karnaugh maps.”ActuallyKarnaugh maps are not on this syllabus, and they exist to simplify — which Topic 10 forbids.What to useThe output-1 rows construction in section 10.4 D. It needs no algebra and produces exactly the unsimplified answer the syllabus wants.
• “You need Boolean algebra laws and De Morgan’s laws for Topic 10.”ActuallyNone of them appears anywhere in this syllabus. Neither do half adders, flip-flops, sequential logic, timing diagrams or transistor circuits.What Topic 10 does needSix symbols, six truth tables, and the nine conversions. That is the whole of it.

• Read the limits as instructions, not as background. “Circuits must be drawn for the statement given, without simplification” is not a hint about how examiners mark — it is the mark scheme. If the expression says NOT (A AND B), the circuit has an AND gate followed by a NOT gate. Replacing the pair with a single NAND gate changes the structure, and the structure is what is being assessed.
• In the exam the rows are usually printed for you. The syllabus prints an example three-input table, already ruled with eight rows and with the A, B and C columns already filled in, ready for the candidate to complete the output column. Two things follow. First, count the rows before you start: the number of rows tells you how many inputs the question has. Second, give yourself intermediate columns — in any space the printed grid leaves beside the output column, or ruled in the margin next to it. Filling them in is how you protect yourself against a slip.
• XOR and EOR are two names for one gate. The syllabus writes it as “XOR (EOR)”. They are not two different gates, they do not have different symbols, and there is no situation in this topic where the choice of name changes an answer. Use whichever the question uses.
• Do not rely on assumed precedence. In ordinary algebra you know that multiplication binds tighter than addition. Boolean expressions in this syllabus are written with brackets precisely so that you do not have to make that kind of assumption — and where an expression is complicated, the brackets are the only reliable guide. If you ever find yourself thinking “I think AND comes before OR here”, re-read the brackets: they will already have told you.
• “Neither” and “not both” have two acceptable shapes. Which one you should write depends on the question. If it simply asks for an expression from a statement, either form is correct as long as the truth table matches. If the question has already given you a structure, or a later part asks you to draw the circuit for the expression you wrote, keep the two forms straight: A NOR B is one gate, NOT (A OR B) is two, and the drawing must match whichever you wrote.
• Where the brackets go is not arbitrary. ((NOT A) AND B) AND C and (NOT A) AND (B AND C) give the same output on every row, and both are two AND gates. Either is acceptable as an expression — but whichever you write is the circuit you must then draw. Write it once, bracket it fully, and draw exactly that.
• An unsimplified circuit can be large, and that is correct. Seven gates for two output-1 rows is normal; three output-1 rows would take ten or eleven, depending on how many of the three inputs have to be inverted somewhere. The syllabus limits the circuit to three inputs and one output — it does not limit the number of gates, and it explicitly forbids reducing them. If your drawing looks inefficient, that is not evidence that you have made a mistake.
• When is a NAND gate the right answer, then? Whenever the thing you were given contains the word NAND, or whenever you are constructing an expression yourself from a statement that says “not both”. What you may never do is replace a given NOT (… AND …) with one. The gate is not forbidden; the substitution is.
• What this challenge is testing that a single-part question cannot. Every part depends on the one before it, so a slip in part (a) travels. That is realistic, and it is why part (d) exists: verification is not an optional flourish, it is the step that catches an error early enough to fix it. In an exam, doing part (d) in your head for one or two rows takes about twenty seconds and is the single highest-value use of that time.